apio verify

Contents

• apio verify
  • Usage
  • Description
  • Options
  • Examples

Usage

apio verify [OPTIONS]

Description

Verify the verilog code. It is agnostic of the FPGA. It does not use the pcf file.

Required packages: scons, iverilog.

Options

-p, --project-dir

Set the target directory for the project.

Examples

1. Verify the leds example

$ apio verify
iverilog -B /path/to/lib/ivl -o hardware.out -D VCD_OUTPUT= /path/to/vlib/system.v leds.v
================================== [SUCCESS] Took 0.17 seconds ==============================